The present invention relates to a method of fabricating a tungsten contact in the form of a plug or via in a semiconductor device incorporating a tungsten contact and in particular relates to such a method employing deposition and etch back of a layer of CVD tungsten.
In semiconductor processing technology it is well known that the step coverage obtained with conventional metallisation processes for the fabrication of contacts in the form of plugs and vias using metals such as aluminium can become a problem as the dimensions of the contacts are reduced to below about 1.5 microns. The reduced step coverage tends to increase the specific contact resistivity of the contacts and the reliability of the contacts is also reduced. Poor step coverage also tends to prevent vertical stacking of the contacts over contacts in the previous interconnect layer. Metal step coverage can be increased by reducing the thickness of the dielectric layer in which the contact is formed. However, this can consequently increase the capacitance and inductance of the layer which tends to produce a reduction in the speed of the resultant semiconductor device.
It is known, in an attempt to overcome this step coverage problem with conventional metallisation, to employ tungsten plug technology in which a contact hole is filled with tungsten by a chemical vapour deposition process to form a contact in the form of a plug or via. The two general tungsten deposition processes employed are blanket tungsten deposition followed by an etch back so as to leave tungsten contacts in the dielectric layer or to employ selective deposition in which tungsten is selectively deposited in contact holes formed in the dielectric layer. Selective tungsten deposition suffers from technical problems which are, for example, the difficulty in filling contact hole of differing depths, the relatively high specific contact resistance of the contacts and a breakdown in the selectivity of the deposition process. The semiconductor industry is increasingly aiming at employing blanket tungsten deposition followed by etch back in order to form tungsten contacts, in the form of plugs and vias which does not suffer from the above stated problems associated with selective tungsten deposition.
It is generally known in the industry that blanket CVD tungsten does not adhere well to dielectric films. Accordingly, it is the general practice to employ an adhesion layer between the dielectric layer and the deposited tungsten, the adhesion layer additionally having been formed over the exposed portions of the silicon substrate to which the tungsten is to be electrically connected. Typically, the adhesion layer comprises a thin, highly adherent sputtered metal film, for example titanium nitride. The adhesion layer is deposited before the silicon wafer is transferred into a CVD tungsten deposition system. The CVD tungsten blanket layer then adheres adequately to the adhesion layer. The adhesion layer is selected so as to be thin enough so as not to reduce the size of the contact but thick enough so as to give sufficient adhesion between the dielectric layer and the overlying tungsten layer. Typically, the adhesion layer is 500 to 1000 Angstroms thick.
It has been found that when an adhesion layer is employed there can be inadequate coverage of the adhesion layer on the side walls of the contact. In addition, when the adhesion layer is applied by sputtering, problems with step coverage in the contact hole can also occur. In addition, when it is desired to reduce the dimensions of the contacts, this can lead to a limitation in the reduction in dimensions as a result of problems with step coverage when employing a sputtering process. When the adhesion layer is deposited by a process other than by sputtering, it may be that the adhesion layer itself is not particularly well adhered to the dielectric layer. In the light of these problems, there is a general need in the industry by both semiconductor equipment vendors and semiconductor manufacturers to eliminate the need for the additional adhesion layer when employing blanket CVD tungsten deposition. This would greatly simplify manufacture of the semiconductor devices by eliminating problems associated with the deposition of the adhesion layer. Furthermore, there is a general need to reduce device dimensions which are currently restricted by the scaling limitations of the technology employed to sputter the adhesion layer.
In a paper entitled "Adhesion of LPVCD WSix/W Bilayers on Oxide Films" by Lami et al, published in the conference proceedings entitled "Advanced Metallization for ULSI Applications" of a conference held by the Materials Research Society on 8-10 Oct. 1991, it is disclosed that WSix LPCVD underlayers were used as adhesion layers on oxides for CVD W metallisation. However, such WSix adhesion layers suffered from a number of problems showing that the obtaining of a manufacturable bilayer of WSix/W is not straightforward because of a sensitivity to the temperature gradient that always occurs during silicide deposition from silane or DCS.